{"id":1053,"date":"2025-04-25T10:03:50","date_gmt":"2025-04-25T08:03:50","guid":{"rendered":"https:\/\/oleg-vyskrebentsev.com\/wordpress\/?p=1053"},"modified":"2025-04-25T10:03:51","modified_gmt":"2025-04-25T08:03:51","slug":"xilinx-zynq-7000","status":"publish","type":"post","link":"https:\/\/oleg-vyskrebentsev.com\/wordpress\/xilinx-zynq-7000\/","title":{"rendered":"Xilinx\u00a0Zynq\u20117000"},"content":{"rendered":"\n

Zynq\u20117010\u202f\u2014 \u043f\u0440\u0435\u0434\u0441\u0442\u0430\u0432\u0438\u0442\u0435\u043b\u044c \u0441\u0435\u043c\u0435\u0439\u0441\u0442\u0432\u0430 \u043e\u0434\u043d\u043e\u043a\u0440\u0438\u0441\u0442\u0430\u043b\u044c\u043d\u044b\u0445 \u0441\u0438\u0441\u0442\u0435\u043c (SoC) Xilinx Zynq\u20117000, \u0432 \u043a\u043e\u0442\u043e\u0440\u044b\u0445 \u0434\u0432\u0430 \u043c\u0438\u0440\u0430\u202f\u2014 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0439 \u0438 \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u0443\u0435\u043c\u043e\u0439 \u043b\u043e\u0433\u0438\u043a\u0438\u202f\u2014 \u0441\u0432\u0435\u0434\u0435\u043d\u044b \u0432 \u043e\u0434\u043d\u043e\u043c \u043a\u0440\u0438\u0441\u0442\u0430\u043b\u043b\u0435. \u041d\u0438\u0436\u0435 \u043f\u043e \u0441\u0443\u0442\u0438:<\/strong><\/p>\n\n\n\n

<\/p>\n\n\n

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\"Xilinx\u00a0Zynq\u20117000\"<\/a><\/figure>\n<\/div>\n\n\n\n

1. \u0427\u0442\u043e \u0442\u0430\u043a\u043e\u0435\u00a0Xilinx\u00a0Zynq\u20117000<\/h2>\n\n\n
\u041a\u043e\u043c\u043f\u043e\u043d\u0435\u043d\u0442<\/th>\u0421\u0443\u0442\u044c<\/th><\/tr><\/thead>\n
PS (Processing\u00a0System)<\/strong><\/td>\u0414\u0432\u0430 32\u2011\u0431\u0438\u0442\u043d\u044b\u0445\u202fARM\u202fCortex\u2011A9\u00a0MPCore (\u0434\u043e\u202f866\u202f\u041c\u0413\u0446), \u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u044b\u00a0DDR3\/LPDDR2, \u043f\u0435\u0440\u0438\u0444\u0435\u0440\u0438\u044f (Ethernet, USB\u202f2.0\u00a0OTG, SDIO, SPI, I\u00b2C, CAN, UART, GPIO, \u0442\u0430\u0439\u043c\u0435\u0440\u044b).<\/td><\/tr>\n
PL (Programmable\u00a0Logic)<\/strong><\/td>\u041f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u0443\u0435\u043c\u0430\u044f \u043b\u043e\u0433\u0438\u043a\u0430 Artix\u20117\u202f(\u0443 \u043c\u043b\u0430\u0434\u0448\u0438\u0445) \u0438\u043b\u0438 Kintex\u20117\u202f(\u0443 \u0441\u0442\u0430\u0440\u0448\u0438\u0445): LUT, \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u044b, DSP\u2011\u0431\u043b\u043e\u043a\u0438, \u0431\u043b\u043e\u043a\u0438\u00a0\u041e\u0417\u0423, \u0442\u0430\u043a\u0442\u043e\u0432\u044b\u0435 \u043c\u0435\u043d\u0435\u0434\u0436\u0435\u0440\u044b.<\/td><\/tr>\n
High\u2011performance\u00a0AXI\u00a0\u0448\u0438\u043d\u044b<\/strong><\/td>\u0428\u0438\u0440\u043e\u043a\u0438\u0435 \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441\u044b \u0441 \u043d\u0438\u0437\u043a\u043e\u0439 \u0437\u0430\u0434\u0435\u0440\u0436\u043a\u043e\u0439 \u043c\u0435\u0436\u0434\u0443 PS\u00a0\u0438\u00a0PL, \u043f\u043e\u0437\u0432\u043e\u043b\u044f\u044e\u0449\u0438\u0435 \u00ab\u0432\u044b\u043b\u0438\u0432\u0430\u0442\u044c\u00bb \u0434\u0430\u043d\u043d\u044b\u0435 \u0438\u0437\u00a0ARM\u00a0\u0432\u00a0FPGA \u0438 \u043e\u0431\u0440\u0430\u0442\u043d\u043e \u0431\u0435\u0437 \u0443\u0447\u0430\u0441\u0442\u0438\u044f\u00a0\u041e\u0421.<\/td><\/tr>\n<\/tbody>\n<\/table>\n

\u0418\u0442\u043e\u0433\u043e: Zynq\u00a0=\u00a0ARM\u00a0+\u00a0FPGA\u00a0+\u00a0\u0441\u043a\u043e\u0440\u043e\u0441\u0442\u043d\u0430\u044f \u0432\u043d\u0443\u0442\u0440\u0435\u043d\u043d\u044f\u044f \u0441\u0432\u044f\u0437\u044c<\/em>.<\/p>\n\n

2. \u0413\u0434\u0435 \u043d\u0430\u0445\u043e\u0434\u0438\u0442\u0441\u044f\u00a07010\u00a0\u0432 \u043b\u0438\u043d\u0435\u0439\u043a\u0435<\/h2>\n\n\n
\u041c\u043e\u0434\u0435\u043b\u044c<\/th>\u041b\u043e\u0433\u0438\u0447\u0435\u0441\u043a\u0438\u0445 \u044f\u0447\u0435\u0435\u043a<\/th>DSP\u2011\u0441\u0440\u0435\u0437\u044b<\/th>RAM\u00a0(BRAM\u202f\u043a\u0431\u0438\u0442)<\/th>\u041e\u0431\u043b\u0430\u0441\u0442\u044c \u043f\u0440\u0438\u043c\u0435\u043d\u0435\u043d\u0438\u044f<\/th><\/tr><\/thead>\n
7010<\/strong><\/td>28\u202fk<\/td>80<\/td>2400<\/td>\u041d\u0435\u0434\u043e\u0440\u043e\u0433\u0438\u0435 \u0432\u0441\u0442\u0440\u0430\u0438\u0432\u0430\u0435\u043c\u044b\u0435 \u0441\u0438\u0441\u0442\u0435\u043c\u044b, \u0432\u0438\u0434\u0435\u043e\u0437\u0430\u0445\u0432\u0430\u0442, \u043f\u0440\u043e\u0441\u0442\u0430\u044f \u043e\u0431\u0440\u0430\u0431\u043e\u0442\u043a\u0430 \u0441\u0438\u0433\u043d\u0430\u043b\u043e\u0432.<\/td><\/tr>\n
7007S<\/td>28\u202fk (\u043e\u0434\u043d\u043e \u044f\u0434\u0440\u043e)<\/td>66<\/td>2400<\/td>\u0421\u0430\u043c\u044b\u0439 \u0431\u044e\u0434\u0436\u0435\u0442\u043d\u044b\u0439, \u043e\u0434\u043d\u043e\u044f\u0434\u0435\u0440\u043d\u044b\u0439 Cortex\u2011A9.<\/td><\/tr>\n
7015<\/td>43\u202fk<\/td>120<\/td>2700<\/td>\u0423\u043c\u0435\u0440\u0435\u043d\u043d\u044b\u0439 DSP\u2011\u0437\u0430\u043f\u0430\u0441, \u043c\u0430\u0448\u0438\u043d\u043d\u043e\u0435 \u0437\u0440\u0435\u043d\u0438\u0435 \u043d\u0430\u0447\u0430\u043b\u044c\u043d\u043e\u0433\u043e \u0443\u0440\u043e\u0432\u043d\u044f.<\/td><\/tr>\n
7020<\/td>53\u202fk<\/td>160<\/td>2800<\/td>\u00ab\u0420\u0430\u0431\u043e\u0447\u0430\u044f \u043b\u043e\u0448\u0430\u0434\u043a\u0430\u00bb: PL \u043f\u043e\u0431\u043e\u043b\u044c\u0448\u0435, \u043f\u0430\u043c\u044f\u0442\u044c \u0442\u0430\u00a0\u0436\u0435.<\/td><\/tr>\n
7030<\/td>125\u202fk<\/td>280<\/td>5600<\/td>\u0421\u043b\u043e\u0436\u043d\u044b\u0435 \u0440\u0430\u0434\u0438\u043e\u0441\u0438\u0441\u0442\u0435\u043c\u044b,\u00a0SDR, \u043c\u0430\u0448\u0438\u043d\u043d\u043e\u0435 \u043e\u0431\u0443\u0447\u0435\u043d\u0438\u0435.<\/td><\/tr>\n
7045<\/td>350\u202fk<\/td>900<\/td>19\u202f000<\/td>\u041f\u0440\u043e\u0434\u0432\u0438\u043d\u0443\u0442\u044b\u0435\u00a0\u0420\u041b\u0421, \u0440\u0435\u043a\u043e\u0440\u0434\u043d\u044b\u0439 \u043f\u0430\u0440\u0430\u043b\u043b\u0435\u043b\u0438\u0437\u043c.<\/td><\/tr>\n
7050<\/td>430\u202fk<\/td>900<\/td>19\u202f700<\/td>\u0422\u043e\u043f Artix\u2011\u0443\u0440\u043e\u0432\u043d\u044f, \u0451\u043c\u043a\u0438\u0435 \u0432\u0438\u0434\u0435\u043e\u2011 \u0438\u00a0AI\u2011\u0437\u0430\u0434\u0430\u0447\u0438.<\/td><\/tr>\n
7100<\/td>444\u202fk<\/td>2020<\/td>27\u202f700<\/td>Kintex\u2011\u0431\u0430\u0437\u043e\u0432\u044b\u0439, \u0441\u0430\u043c\u044b\u0439 \u043c\u043e\u0449\u043d\u044b\u0439 (PCIe\u202fGen2\u202fx8, GTX\u2011\u0442\u0440\u0430\u043d\u0441\u0438\u0432\u0435\u0440\u044b\u00a0\u0434\u043e\u202f12.5\u202f\u0413\u0431\u0438\u0442\/\u0441).<\/td><\/tr>\n<\/tbody>\n<\/table>\n

\u041a\u043b\u044e\u0447\u0435\u0432\u044b\u0435 \u0440\u0430\u0437\u043b\u0438\u0447\u0438\u044f<\/strong>\u00a0\u2014 \u043e\u0431\u044a\u0451\u043c \u043b\u043e\u0433\u0438\u043a\u0438, \u0447\u0438\u0441\u043b\u043e\u00a0DSP \u0438 \u043d\u0430\u043b\u0438\u0447\u0438\u0435\u00a0S\u2011\u0432\u0430\u0440\u0438\u0430\u043d\u0442\u0430 (single\u2011core). \u041f\u043e\u00a0\u043f\u0435\u0440\u0438\u0444\u0435\u0440\u0438\u0438\u00a0PS \u0432\u0441\u0435 \u043e\u0434\u0438\u043d\u0430\u043a\u043e\u0432\u044b.<\/p>\n\n

3. \u041f\u043e\u0447\u0435\u043c\u0443 \u044d\u0442\u043e \u0443\u0434\u043e\u0431\u043d\u043e<\/h2>\n
    \n
  • \u041c\u0435\u043d\u044c\u0448\u0435 \u043a\u043e\u043c\u043f\u043e\u043d\u0435\u043d\u0442\u043e\u0432 \u043d\u0430\u00a0\u043f\u043b\u0430\u0442\u0435: \u043d\u0435\u00a0\u043d\u0443\u0436\u043d\u043e \u043e\u0442\u0434\u0435\u043b\u044c\u043d\u043e\u0435\u202fFPGA \u0438\u00a0\u043e\u0442\u0434\u0435\u043b\u044c\u043d\u044b\u0439\u202fMPU.<\/li>\n
  • \u041a\u0440\u0430\u0439\u043d\u0435 \u0431\u044b\u0441\u0442\u0440\u0430\u044f \u0441\u0432\u044f\u0437\u044c (AXI\u00a0HP\/ACP): \u0441\u043e\u0442\u043d\u0438\u202f\u041c\u0411\/\u0441 \u043c\u0435\u0436\u0434\u0443 Linux\u2011\u043f\u0440\u0438\u043b\u043e\u0436\u0435\u043d\u0438\u0435\u043c \u0438\u00a0\u00ab\u0436\u0435\u043b\u0435\u0437\u043d\u043e\u0439\u00bb \u043e\u0431\u0440\u0430\u0431\u043e\u0442\u043a\u043e\u0439 \u0432\u00a0PL.<\/li>\n
  • \u0413\u0438\u0431\u043a\u043e\u0441\u0442\u044c \u0436\u0438\u0437\u043d\u0435\u043d\u043d\u043e\u0433\u043e \u0446\u0438\u043a\u043b\u0430: \u0430\u043b\u0433\u043e\u0440\u0438\u0442\u043c \u043c\u043e\u0436\u043d\u043e \u0443\u0441\u043a\u043e\u0440\u0438\u0442\u044c \u00ab\u0436\u0435\u043b\u0435\u0437\u043e\u043c\u00bb, \u043d\u0435\u00a0\u043c\u0435\u043d\u044f\u044f \u043e\u0441\u0442\u0430\u043b\u044c\u043d\u0443\u044e \u0447\u0430\u0441\u0442\u044c \u0441\u0438\u0441\u0442\u0435\u043c\u044b.<\/li>\n
  • Energy\u2011per\u2011task \u043d\u0438\u0436\u0435, \u0447\u0435\u043c \u0443\u00a0\u0447\u0438\u0441\u0442\u043e \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0445 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0439.<\/li>\n<\/ul>\n\n

    4. \u0422\u0438\u043f\u0438\u0447\u043d\u044b\u0435 \u0441\u0446\u0435\u043d\u0430\u0440\u0438\u0438 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u044f\u00a07010<\/h2>\n
      \n
    1. \u041f\u0440\u043e\u043c\u044b\u0448\u043b\u0435\u043d\u043d\u044b\u0439 Ethernet\u2011\u0448\u043b\u044e\u0437<\/strong>: ARM \u043a\u0440\u0443\u0442\u0438\u0442\u00a0Linux \u0438\u00a0TCP\/IP\u2011\u0441\u0442\u0435\u043a, PL \u0440\u0435\u0430\u043b\u0438\u0437\u0443\u0435\u0442 \u0434\u0435\u0442\u0435\u0440\u043c\u0438\u043d\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u044b\u0439\u00a0TSN\u2011\u043c\u0430\u0441\u0442\u0435\u0440.<\/li>\n
    2. \u041a\u0430\u043c\u0435\u0440\u0430 \u043d\u0430\u0431\u043b\u044e\u0434\u0435\u043d\u0438\u044f\u00a01080p<\/strong>: ARM \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430\u00a0H.264\u202f\u044d\u043d\u043a\u043e\u0434\u0435\u0440, PL\u202f\u2014 \u0437\u0430\u00a0real\u2011time\u00a0ISP\/\u043e\u0431\u043d\u0430\u0440\u0443\u0436\u0435\u043d\u0438\u0435 \u0434\u0432\u0438\u0436\u0435\u043d\u0438\u044f.<\/li>\n
    3. \u0426\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u043e\u0441\u0446\u0438\u043b\u043b\u043e\u0433\u0440\u0430\u0444\/\u0430\u043d\u0430\u043b\u0438\u0437\u0430\u0442\u043e\u0440 \u043f\u0440\u043e\u0442\u043e\u043a\u043e\u043b\u043e\u0432<\/strong>: PL \u0431\u044b\u0441\u0442\u0440\u043e \u0437\u0430\u0445\u0432\u0430\u0442\u044b\u0432\u0430\u0435\u0442 \u0441\u0438\u0433\u043d\u0430\u043b\u044b, ARM \u043e\u0442\u0440\u0438\u0441\u043e\u0432\u044b\u0432\u0430\u0435\u0442 \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441.<\/li>\n
    4. \u0410\u0433\u0440\u0435\u0433\u0430\u0442\u043e\u0440 \u0434\u0430\u0442\u0447\u0438\u043a\u043e\u0432 \u0432\u00a0\u0440\u043e\u0431\u043e\u0442\u043e\u0442\u0435\u0445\u043d\u0438\u043a\u0435<\/strong>: PL \u043e\u0431\u0440\u0430\u0431\u0430\u0442\u044b\u0432\u0430\u0435\u0442\u00a0PWM\/\u043a\u0432\u0430\u0434\u0440\u0430\u0442\u0443\u0440\u0443, ARM \u0437\u0430\u043f\u0443\u0441\u043a\u0430\u0435\u0442\u00a0ROS\u2011\u043d\u043e\u0434\u0443.<\/li>\n<\/ol>\n\n

      5. \u042d\u043a\u043e\u0441\u0438\u0441\u0442\u0435\u043c\u0430 \u0438 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u043a\u0430<\/h2>\n
        \n
      • Vivado Design\u00a0Suite<\/strong>: \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u0430\u044f \u0447\u0430\u0441\u0442\u044c\u00a0(PL), IP\u2011\u044f\u0434\u0440\u0430, Block\u00a0Design \u0441\u00a0Zynq\u00a0Processing\u202fSystem\u00a0IP.<\/li>\n
      • Vitis (\u0431\u044b\u0432\u0448\u0438\u0439\u00a0SDK)<\/strong>: bare\u2011metal \u0438\u043b\u0438\u00a0Linux\u2011C, \u043f\u043e\u0434\u0434\u0435\u0440\u0436\u043a\u0430\u00a0PetaLinux\u00a0BSP.<\/li>\n
      • PetaLinux<\/strong>: \u0433\u043e\u0442\u043e\u0432\u0430\u044f \u0441\u0440\u0435\u0434\u0430\u00a0Yocto\u2011\u0441\u043e\u0432\u043c\u0435\u0441\u0442\u0438\u043c\u0430\u044f, \u0441\u043e\u0437\u0434\u0430\u0451\u0442 \u043e\u0431\u0440\u0430\u0437 \u0434\u043b\u044f\u00a0PS.<\/li>\n
      • PL\u2011\u0430\u043a\u0441\u0435\u043b\u0435\u0440\u0430\u0446\u0438\u044f<\/strong> \u0438\u0437\u00a0C\/C++\/HLS \u0447\u0435\u0440\u0435\u0437\u00a0Vitis\u00a0HLS \u0438\u043b\u0438\u00a0Vitis\u202fAccelerated\u202fLibraries.<\/li>\n<\/ul>\n\n

        6. \u041f\u043b\u044e\u0441\u044b \u0438\u00a0\u043c\u0438\u043d\u0443\u0441\u044b Zynq\u20117010<\/h2>\n

        \u041f\u043b\u044e\u0441\u044b<\/strong><\/p>\n

          \n
        • \u0414\u0435\u0448\u0435\u0432\u043b\u0435 \u0438 \u044d\u043d\u0435\u0440\u0433\u043e\u044d\u0444\u0444\u0435\u043a\u0442\u0438\u0432\u043d\u0435\u0435 \u0441\u0442\u0430\u0440\u0448\u0438\u0445 \u043c\u043e\u0434\u0435\u043b\u0435\u0439.<\/li>\n
        • \u0414\u043e\u0441\u0442\u0430\u0442\u043e\u0447\u043d\u043e \u043b\u043e\u0433\u0438\u043a\u0438 \u0434\u043b\u044f\u00a095\u202f% \u00ab\u0438\u043d\u0434\u0443\u0441\u0442\u0440\u0438\u0430\u043b\u044c\u043d\u044b\u0445\u00bb \u0437\u0430\u0434\u0430\u0447.<\/li>\n
        • \u041f\u0430\u043a\u0435\u0442\u044b\u00a0CLG225\/CSG324\u00a0\u2014 \u043f\u0440\u043e\u0441\u0442\u044b\u0435 \u0432 \u0440\u0430\u0437\u0432\u043e\u0434\u043a\u0435, \u0435\u0441\u0442\u044c \u043e\u0442\u043b\u0430\u0434\u043e\u0447\u043d\u044b\u0435 \u043f\u043b\u0430\u0442\u044b (PYNQ\u2011Z1, Digilent\u00a0Arty\u00a0Z7\u201110 \u0438\u00a0\u0434\u0440.).<\/li>\n<\/ul>\n

          \u041c\u0438\u043d\u0443\u0441\u044b<\/strong><\/p>\n

            \n
          • \u041d\u0435\u0442 \u0432\u044b\u0441\u043e\u043a\u043e\u0441\u043a\u043e\u0440\u043e\u0441\u0442\u043d\u044b\u0445\u00a0GTX\u2011\u0442\u0440\u0430\u043d\u0441\u0438\u0432\u0435\u0440\u043e\u0432\u00a0\u2192 \u043c\u0430\u043a\u0441\u0438\u043c\u0443\u043c\u00a0LVDS\/SDR \u0434\u043e\u00a0\u22481\u202f\u0413\u0431\u0438\u0442\/\u0441.<\/li>\n
          • \u0422\u043e\u043b\u044c\u043a\u043e\u00a02400\u202f\u043a\u0431\u0438\u0442 BRAM\u00a0\u2192 \u0431\u043e\u043b\u044c\u0448\u0438\u0435 \u0431\u0443\u0444\u0435\u0440\u044b \u043d\u0443\u0436\u043d\u043e \u0445\u0440\u0430\u043d\u0438\u0442\u044c \u0432\u00a0DDR.<\/li>\n
          • \u0422\u0440\u0443\u0434\u043e\u0451\u043c\u043a\u0430\u044f \u0446\u0435\u043f\u043e\u0447\u043a\u0430 Vivado\u00a0(\u043b\u0438\u0446\u0435\u043d\u0437\u0438\u044f, \u0440\u0435\u0441\u0443\u0440\u0441\u044b\u00a0\u041f\u041a).<\/li>\n<\/ul>\n\n

            7. \u041a\u0430\u043a \u0432\u044b\u0431\u0440\u0430\u0442\u044c \u043f\u043e\u0434\u0445\u043e\u0434\u044f\u0449\u0443\u044e \u043c\u043e\u0434\u0435\u043b\u044c Xilinx\u00a0Zynq\u20117000<\/h2>\n\n\n
            \u0415\u0441\u043b\u0438 \u043d\u0443\u0436\u043d\u043e<\/th>\u0412\u044b\u0431\u0435\u0440\u0438\u0442\u0435<\/th><\/tr><\/thead>\n
            \u0421\u0430\u043c\u044b\u0439 \u043d\u0438\u0437\u043a\u0438\u0439\u00a0BOM \u0438\u00a0\u043e\u0434\u043d\u043e ARM\u2011\u044f\u0434\u0440\u043e<\/td>7007S<\/td><\/tr>\n
            \u041d\u0435\u0431\u043e\u043b\u044c\u0448\u0430\u044f\u00a0PL \u0441 \u0434\u0432\u0443\u0445\u044a\u044f\u0434\u0435\u0440\u043d\u044b\u043c ARM<\/td>7010<\/strong><\/td><\/tr>\n
            +30\u202f% \u043b\u043e\u0433\u0438\u043a\u0438 \u0438\u00a0DSP<\/td>7015<\/td><\/tr>\n
            \u041f\u043e\u043f\u0443\u043b\u044f\u0440\u043d\u044b\u0439 \u0431\u0430\u043b\u0430\u043d\u0441 \u00ab\u0446\u0435\u043d\u0430\/\u0432\u043e\u0437\u043c\u043e\u0436\u043d\u043e\u0441\u0442\u0438\u00bb<\/td>7020<\/td><\/tr>\n
            >100\u202fk \u043b\u043e\u0433\u0438\u0447\u0435\u0441\u043a\u0438\u0445 \u044f\u0447\u0435\u0435\u043a, \u0432\u0438\u0434\u0435\u043e\u00a04K<\/td>7030<\/td><\/tr>\n
            \u041c\u0430\u0441\u0441\u0438\u0432\u043d\u044b\u0439 \u043f\u0430\u0440\u0430\u043b\u043b\u0435\u043b\u0438\u0437\u043c,\u00a0PCIe\u00a0x8<\/td>7045\/7050\/7100<\/td><\/tr>\n<\/tbody>\n<\/table>\n\n

            \u0418\u0442\u043e\u0433\u043e:<\/strong> Zynq\u20117010\u00a0\u2014 \u044d\u0442\u043e \u0438\u043d\u0442\u0435\u0433\u0440\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u0430\u044f ARM\u202f+\u202fFPGA \u043f\u043b\u0430\u0442\u0444\u043e\u0440\u043c\u0430 \u0441\u0440\u0435\u0434\u043d\u0435\u0433\u043e \u0443\u0440\u043e\u0432\u043d\u044f, \u0438\u0434\u0435\u0430\u043b\u044c\u043d\u043e \u043f\u043e\u0434\u0445\u043e\u0434\u044f\u0449\u0430\u044f \u0434\u043b\u044f \u044d\u043a\u043e\u043d\u043e\u043c\u0438\u0447\u043d\u044b\u0445 \u0432\u0441\u0442\u0440\u0430\u0438\u0432\u0430\u0435\u043c\u044b\u0445 \u0441\u0438\u0441\u0442\u0435\u043c, \u0442\u0440\u0435\u0431\u0443\u044e\u0449\u0438\u0445 \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u043e\u0433\u043e \u0443\u0441\u043a\u043e\u0440\u0435\u043d\u0438\u044f. \u0415\u0441\u043b\u0438 \u0437\u0430\u0434\u0430\u0447\u0430\u043c \u043d\u0443\u0436\u043d\u044b \u0431\u043e\u043b\u0435\u0435 \u0442\u044f\u0436\u0451\u043b\u044b\u0435 DSP\u2011\u0440\u0435\u0441\u0443\u0440\u0441\u044b \u0438\u043b\u0438\u00a0\u0432\u044b\u0441\u043e\u043a\u043e\u0441\u043a\u043e\u0440\u043e\u0441\u0442\u043d\u044b\u0435 \u0441\u0435\u0440\u0434\u0435\u0447\u043d\u0438\u043a\u0438, \u0441\u043c\u043e\u0442\u0440\u044f\u0442 \u043d\u0430\u00a07020\/7030 \u0438\u00a0\u0432\u044b\u0448\u0435; \u0435\u0441\u043b\u0438 \u0441\u0447\u0451\u0442 \u0438\u0434\u0451\u0442 \u043d\u0430\u00a0\u0434\u043e\u043b\u043b\u0430\u0440\u044b \u0438 \u0432\u0430\u0442\u0442\u2011\u0447\u0430\u0441\u044b\u202f\u2014\u00a07010 \u043e\u0441\u0442\u0430\u0451\u0442\u0441\u044f \u00absweet\u00a0spot\u00bb.<\/p>\n\n\n","protected":false},"excerpt":{"rendered":"

            Zynq\u20117010\u202f\u2014 \u043f\u0440\u0435\u0434\u0441\u0442\u0430\u0432\u0438\u0442\u0435\u043b\u044c \u0441\u0435\u043c\u0435\u0439\u0441\u0442\u0432\u0430 \u043e\u0434\u043d\u043e\u043a\u0440\u0438\u0441\u0442\u0430\u043b\u044c\u043d\u044b\u0445 \u0441\u0438\u0441\u0442\u0435\u043c (SoC) Xilinx Zynq\u20117000, \u0432 \u043a\u043e\u0442\u043e\u0440\u044b\u0445 \u0434\u0432\u0430 \u043c\u0438\u0440\u0430\u202f\u2014 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0439 \u0438 \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u0443\u0435\u043c\u043e\u0439 \u043b\u043e\u0433\u0438\u043a\u0438\u202f\u2014 \u0441\u0432\u0435\u0434\u0435\u043d\u044b \u0432 \u043e\u0434\u043d\u043e\u043c \u043a\u0440\u0438\u0441\u0442\u0430\u043b\u043b\u0435. \u041d\u0438\u0436\u0435 \u043f\u043e \u0441\u0443\u0442\u0438: 1. \u0427\u0442\u043e \u0442\u0430\u043a\u043e\u0435\u00a0Xilinx\u00a0Zynq\u20117000 \u041a\u043e\u043c\u043f\u043e\u043d\u0435\u043d\u0442 \u0421\u0443\u0442\u044c PS (Processing\u00a0System) \u0414\u0432\u0430 32\u2011\u0431\u0438\u0442\u043d\u044b\u0445\u202fARM\u202fCortex\u2011A9\u00a0MPCore (\u0434\u043e\u202f866\u202f\u041c\u0413\u0446), \u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u044b\u00a0DDR3\/LPDDR2, \u043f\u0435\u0440\u0438\u0444\u0435\u0440\u0438\u044f (Ethernet, USB\u202f2.0\u00a0OTG, SDIO, SPI, I\u00b2C, CAN, UART, GPIO, \u0442\u0430\u0439\u043c\u0435\u0440\u044b). PL (Programmable\u00a0Logic) \u041f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u0443\u0435\u043c\u0430\u044f \u043b\u043e\u0433\u0438\u043a\u0430 Artix\u20117\u202f(\u0443 \u043c\u043b\u0430\u0434\u0448\u0438\u0445) \u0438\u043b\u0438 Kintex\u20117\u202f(\u0443 \u0441\u0442\u0430\u0440\u0448\u0438\u0445): LUT, \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u044b, DSP\u2011\u0431\u043b\u043e\u043a\u0438, \u0431\u043b\u043e\u043a\u0438\u00a0\u041e\u0417\u0423, \u0442\u0430\u043a\u0442\u043e\u0432\u044b\u0435 \u043c\u0435\u043d\u0435\u0434\u0436\u0435\u0440\u044b. High\u2011performance\u00a0AXI\u00a0\u0448\u0438\u043d\u044b […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-1053","post","type-post","status-publish","format-standard","hentry","category-bez-rubriki"],"yoast_head":"\nXilinx\u00a0Zynq\u20117000 - Oleg Vyskrebentsev Com<\/title>\n<meta name=\"description\" content=\"Xilinx\u00a0Zynq\u20117000 \u043f\u0440\u043e\u0433\u0440\u0435\u0441\u0441\u0438\u0432\u043d\u0430\u044f \u0441\u0435\u0440\u0438\u044f \u043a\u0438\u0442\u0430\u0439\u0441\u043a\u0438\u0445 \u043c\u0438\u043a\u0440\u043e\u0441\u0445\u0435\u043c \u0440\u0430\u0437\u043b\u0438\u0447\u043d\u043e\u0433\u043e \u043d\u0430\u0437\u043d\u0430\u0447\u0435\u043d\u0438\u044f Xilinx\u00a0Zynq\u20117000 - Oleg Vyskrebentsev Com\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/oleg-vyskrebentsev.com\/wordpress\/xilinx-zynq-7000\/\" \/>\n<meta property=\"og:locale\" content=\"ru_RU\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Xilinx\u00a0Zynq\u20117000 - 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